Universal DSP Library

Overview

Enclustra’s Universal DSP Library (EN_DSP) provides efficient FPGA implementations of the most common digital signal processing components, such as FIR and CIC filters, mixers, CORDIC and function approximations. It also provides the necessary glue logic needed to connect DSP systems together, such as multiplexers, stream splitters, buffers, TDM-parallel converters and fixed-point format converters.

The main emphasis is on minimizing development time. Every component is provided not only in raw VHDL source code, but also as a AMD Vivado™ ML Design Suite IPI block. This allows signal processing chains to be built rapidly using Vivado’s Block Design GUI, or by direct VHDL instantiation.

Highlights

• Every component is provided in both raw VHDL and a AMD Vivado™ ML Design Suite IPI block.
• Bit-true software models are provided for every DSP block (in Python), so the whole processing chain can be evaluated in software before stepping into FPGA implementation.
• Reference designs are provided, showing how EN_DSP blocks can be connected to form signal processing systems.
• Full documentation and bit-true software models are available for free.
• Offers out-of-the-box solutions for:
• Finite Impulse Response (FIR) filter
• Cascaded Integrator-Comb (CIC) decimating filter
• Mixer
• CORDIC
• Function approximations

Benefits

• Covers the common and repetitive DSP tasks, allowing developers to focus on critical project-specific details.
• Massively reduces development time due to quick and easy integration and configuration using Vivado’s IP Integrator tools.

Features

• Supports multiple independent data channels (both in parallel and TDM).
• Supports continuous wave (CW) and pulse processing.
• Supports real and complex (IQ) signals.
• Uses a standardized and simple interface specification, based on the widely-used AXI4-Stream protocol.

Continuous Wave Processing FM Demodulator Example

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Pulse Signal Emulator Example

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Product Selection Matrix

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Base License Components

• ArithOp – Arithmetic Operation
• BlockStat – Block Statistics
• ChannelClone – Clone Channels N times
• ChannelConcat – Concatenate Channels of N Streams
• ChannelHandlingConv – Channel Handling Converter
• ChannelMux – Channel Multiplexer
• ChannelSlice – Extract a Slice of Channels
• ChannelSum – Sum All Channels
• ChannelUnzip – UnZip Channels to Two Output Streams
• ChannelZip – Zip Channels of Two Input Streams
• CordicVect – Vectoring CORDIC (Cartesian to Polar Conversion)
• FormatConv – Fixed-Point Number Format Conversion
• FuncApprox – Function Approximation

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• LimitSplRate – Sample Rate Limiter
• PolToCplx – Polar to Cartesian Conversion
• SampleClone – Clone each Sample N Times
• SelfTrigger – Threshold-Based Trigger Generator
• StreamBuffer – Synchronous FIFO Buffer
• StreamBufferAsync – Asynchronous FIFO Buffer
• StreamDuplicate – Stream Duplication
• StreamMux – Stream Multiplexer
• StreamObserver – Stream Observer (Logic Analyzer)
• StreamSink – Stream Sink (End Termination)
• StreamSource – Stream Source (Start Termination)
• StreamSpy – Passive Stream Spy
• TriggerSync – Synchronize External Trigger

Continuous Wave Processing Components

• CwCic – CW CIC Filter
• CwCumsum – CW Cumulative Sum
• CwDds – CW Direct Digital Synthesizer
• CwDiff – CW Difference
• CwFir – CW FIR Filter
• CwMixer – CW Mixer
• CwSampleHold – CW Sample and Hold
• CwWhiteNoise – CW White Noise Generator

Pulse Processing Components

• PulseBaseline – Pulse Baseline Compensation
• PulseCic – Pulse CIC Filter
• PulseExtract – Pulse Extraction
• PulseFir – Pulse FIR Filter
• PulseMixer – Pulse Mixer
• PulsePlayer – Pulse Player

Deliverables

• A library of AMD IPI blocks, including raw (unencrypted) VHDL source code.
• Comprehensive documentation, covering EN_DSP usage, interface specifications and detailed technical documentation for every IP block.
• Bit-true software models for all DSP components.
• Self-checking VHDL testbenches for all DSP components.
• A reference design, demonstrating how EN_DSP blocks can be connected to form a signal processing system.

Site License Model

• The license is granted to an "authorized site", meaning a single geographical location with radius < 5 km in which the licensee conducts business.
• The licensed material can be used for unlimited projects and/or end products developed at the authorized site.

• More information can be found in the FAQs.

Target Applications

• Digital signal processing (DSP)
• Software-defined radio (SDR)
• Communication
• Test and measurement
• Automation
• Embedded processing
• Medical diagnostics
• Robotics
• Image processing
• … and many more